1. Field of the Invention
The present invention relates to a nitride semiconductor device, a production method thereof, a diode, and a field effect transistor.
2. Description of the Related Art
Since a wide bandgap semiconductor has high insulation breakdown voltage, good electron-transferring characteristics, and good thermal conductivity, and thus it is very attractive material for a semiconductor device for use in high-temperature environment, large power application, and high frequency application. As a typical wide bandgap semiconductor, there is a nitride semiconductor made of GaN, AlN, InN, and BN, or a mixed crystal of not less than two of these elements. In a semiconductor device having an AlGaN/GaN heterojunction structure, a two-dimensional electron gas is produced at a hetero junction interface by Piezoelectric polarization and spontaneous polarization. This two-dimensional electron gas has high electron mobility and carrier density.
Therefore, field effect transistors (FETs) such as semiconductor devices having AlGaN/GaN heterojunction structures as such, for example, a schottky barrier diode (SBD), a high electron mobility transistor (HEMT) and the like have high voltage resistance, low on-state resistance, and high switching speed, and thus are very suitable for being applied to power-switching use. On the other hand, since a high voltage is applied to, and flows through, these semiconductor devices, these semiconductor devices are required for reduction in parasitic capacity and on-state resistance.
To address these requirements, Japanese Patent No. 4389935 (hereinafter to be referred to as Patent Literature 1) proposes a semiconductor device in which parasitic capacity is reduced, while a forward voltage is lowered, by decreasing an internal resistance, by removing 2DEG, in a semiconductor layer between an electrode and a 2DEG by forming a recessed-portion reaching an interface of two semiconductor layers in which two-dimensional electron gas (2DEG) is formed. Japanese Patent Application Laid-open Publication No. 2011-204984 (hereinafter to be referred to as Patent Literature 2) proposes an FET, capable of highly effective operation at a high temperature, by forming an insulation area by removing a 2DEG layer by an ion injection method between drain ohmics each formed below a plurality of drain electrodes in an field effect transistor in which the drain ohmics are formed under a drain electrode to reduce parasitic capacity relative to the substrate. Japanese Patent Application Laid-open Publication No. 2013-123023 (hereinafter to be referred to as Patent Literature 3)proposes a nitride semiconductor element in which a parasitic capacity is reduced and a leak current is restrained from being produced by providing, below an electrode, an isolation area formed by making an inert element be subjected to ion injection.